Dynamic memory with improved address counter for serial modes

Details Dynamic memory with improved address counter for serial modes Dynamic memory with improved address counter for serial modes

1984-07-26

1986-10-21

Popek, Joseph A.

Static information storage and retrieval

Addressing

365189, G11C 800

Patent

active

046189475

ABSTRACT:
A semiconductor dynamic read/write memory device has serial data input/output modes, such as the so-called nibble, byte or extended nibble modes. This device employs improved address counter circuitry to access data from a selected row. An initial column address is latched when a serial mode is initiated, and the counter steps through the programmed number of bits, starting at the initial address. The number of bits used in the serial mode may be selected by metal-mask programming. To avoid a speed penalty, look-ahead circuitry initiates the set up for serial mode before the controls for this mode are detected.

REFERENCES:
patent: 4072932 (1978-02-01), Kitagawa et al.

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