Dynamic memory device

Details Dynamic memory device Dynamic memory device

1989-09-07

1991-05-14

Mintel, William

357 45, 357 55, 357 68, H01L 2968, H01L 2710, H01L 2906, H01L 2348

Patent

active

050160710

ABSTRACT:
Element regions which are adjacent to each other in a channel width direction are displaced from each other in a channel length direction by 1/4 pitch. Cell plate electrodes are formed over the element regions through a capacitor insulation film to extend in an oblique direction. Groove portions formed in a step-form corresponding to the shape of the respective transistor forming regions of the element regions are each formed between corresponding two adjacent ones of the cell plate electrodes. Word lines are formed in a stripe configuration to extend in a channel width direction and used to directly apply potentials to the element regions. Contact holes are formed for contact hole opening preparation regions of the element regions. Bit lines are formed in a stripe configuration to extend in a length width direction and are connected to respective element regions (1) via the contact holes.

REFERENCES:
patent: 4748597 (1988-05-01), Saito et al.
patent: 4860070 (1989-08-01), Arimoto et al.
European Search Report EP 89 11 6870 at The Hague by Examiner P. Vendange on Jan. 15, 1990.
U.S. Patent Application Ser. No. 07/000,463; Entitled: Semiconductor Memory; Filed 1/5/87.
U.S. Patent Application Ser. No. 07/310,020; Entitled: Semiconductor Memory; Filed 2/9/89.
U.S. Patent Application Ser. No. 07/117,523; Entitled: Method of Manufacturing Semiconductor Device; Filed 11/6/87.
U.S. Patent Application Ser. No. 07/096,300; Entitled: Precharge Circuit for Bit Lines of Semiconductor Memory; Filed 9/9/87.
U.S. Patent Application Ser. No. 07/404,421; Entitled: Semiconductor Memory Device; Filed 9/8/89.
U.S. Patent Application Ser. No. 07/403,292; Entitled: Cell Capacitor of a Dynamic Random Access Memory and a Method of Manufacturing the Same; Filed 9/5/89.
U.S. Patent Application Ser. No. 07/216,045; Entitled: Semiconductor Device Having Different Impurity Concentration Wells; Filed 7/7/88.
U.S. Patent Application Ser. No. 07/416,601; Entitled: Dynamic Memory Device With Improved Wiring Layer Layout; Filed 10/3/89.

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