Dynamic memory cell programming voltage

Details Dynamic memory cell programming voltage Dynamic memory cell programming voltage

2000-02-25

2001-03-20

Mai, Son (Department: 2818)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185220, C365S185280

Reexamination Certificate

active

06205055

ABSTRACT:

BACKGROUND
A flash memory cell can be a field effect transistor (FET) that includes a select gate, a floating gate, a drain, and a source. A cell can be read by grounding the source, and applying a voltage to a bitline connected with the drain. By applying a voltage to the wordline connected to the select gate, the cell can be switched on and off.
Programming a cell includes trapping excess electrons in the floating gate to increase voltage. This reduces the current conducted by the memory cell when the select voltage is applied to the select gate. The flash cell is programmed when the cell current is less than a reference current when the select voltage is applied. The cell is erased when the cell current is greater than the reference current and the select voltage is applied.
BRIEF SUMMARY OF THE PREFERRED EMBODIMENTS
A method of programming a memory cell comprises erasing, programming, and determining the pulse count for one or more memory cells. The memory cell(s) is erased. Then, the memory cell is programmed with a first programming voltage. A first pulse count is determined. The first pulse count indicates the number of programming pulses used to program the memory cell with the first programming voltage. The first pulse count is compared with a target pulse count. The programming voltage is stored if the first pulse count compares with the target pulse count. If the first pulse count fails to compare with the target pulse count, the memory cell(s) is programmed with a second programming voltage and the process is repeated until the pulse count compares with the target pulse count.


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