Dynamic latch state saving device and protocol

Details Dynamic latch state saving device and protocol Dynamic latch state saving device and protocol

2006-09-12

2009-02-24

Le, Vu A (Department: 2824)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

C327S203000

Reexamination Certificate

active

07495492

ABSTRACT:
The invention comprises a dynamic voltage state-saving latch electrical circuit comprising a charge device adapted as a storage element, an integrated recovery mechanism, a supply voltage rail connected to the charge device, a hold signal allocated to the integrated recovery mechanism, a data signal input allocated to said charge device, a data signal output distributed from the charge device, and a clock signal allotted to the charge device, wherein said integrated recovery mechanism maintains a state of the charge device independent of the charge device.

REFERENCES:
patent: 5065362 (1991-11-01), Herdt et al.
patent: 5361224 (1994-11-01), Takasu
patent: 5461649 (1995-10-01), Bailey et al.
patent: 5646566 (1997-07-01), Ross, Jr. et al.
patent: 5712826 (1998-01-01), Wong et al.
patent: 6493257 (2002-12-01), Coughlin et al.
patent: 6667645 (2003-12-01), Fletcher et al.
patent: 6762638 (2004-07-01), Correale et al.
patent: 6927614 (2005-08-01), Oakland et al.
patent: 2001/0038304 (2001-11-01), Waldie et al.
patent: 58117055 (1983-07-01), None

Affiliated with

Also associated with

Rating

Dynamic latch state saving device and protocol does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dynamic latch state saving device and protocol, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dynamic latch state saving device and protocol will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4055284