Dynamic instruction allocation for a SIMD processor

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Details

395800, 395385, 395595, G06F 1500

Patent

active

056491794

ABSTRACT:
A method and apparatus to dynamically allocate instructions to programmable processing element decoders (78, 79, 80) in a SIMD processor (100) includes a source code instruction (71) for the processor is parsed (1) into components (75, 76, 77) that apply to specific processing elements (60, 61, 62). The components (75, 76, 77) are used to determine control signals (90, 91, 92) that must be generated from the processing element instruction decoders (50, 51, 52) in order to execute the given instruction. If a processing element instruction decoder (50, 51, 52) is not capable of producing the necessary control signals (90, 91, 92), the decoder (50, 51, 52) must be reconfigured to do so. Then the processing element instruction (75, 76, 77) that will generate the specified control logic can be determined and returned to the assembler or compiler so that the assembly or compilation of the program can be completed.

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