Dynamic input latch

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

Patent

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Details

307443, 307546, 307554, 307558, H03K 1716, H03K 1708, H03K 17687, H03K 19094

Patent

active

047602830

ABSTRACT:
An output circuit (10) prevents the propagation of false signals caused by inductive voltages present at the power supply (Vcc) and ground (46) nodes by latching the input signal until the inductive voltages have dissipated. Inverting stages (28, 30 and 32) provide a predetermined time interval over which the input signal is latched.

REFERENCES:
patent: 3904888 (1975-09-01), Griffin et al.
patent: 3947829 (1976-03-01), Suzuki
patent: 3989955 (1976-11-01), Suzuki
patent: 4275316 (1981-06-01), Knapp
patent: 4506164 (1985-03-01), Higuchi
patent: 4554467 (1985-11-01), Vaughn
patent: 4568842 (1986-02-01), Koike
patent: 4587665 (1986-05-01), Minakuchi
patent: 4656373 (1987-04-01), Plus

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