Electricity: measuring and testing – Magnetic – With means to create magnetic field to test material
Reexamination Certificate
2002-10-08
2004-09-28
Le, N. (Department: 2862)
Electricity: measuring and testing
Magnetic
With means to create magnetic field to test material
C324S242000
Reexamination Certificate
active
06798197
ABSTRACT:
BACKGROUND
1. Field of Technology
This invention relates to eddy current signal processing, and more particularly to digital extraction of an eddy current signal employing dynamic signal amplification and phase compensation.
2. Prior Art
When an eddy current probe is in the vicinity of a flaw in a material, such as a hole or a crack, the flaw will modulate a carrier signal introduced into the material from an alternating current in a coil in the eddy current probe.
It is known to extract the signal through digital signal processing. Generally, a digital oscillator generates a digital carrier signal and corresponding sine and cosine waves. The carrier is then converted to an analog signal, low-pass filtered, and then directed to a probe coil that generates an electromagnetic field that penetrates into a nearby material. An eddy current is generated in the material, which generates its own electromagnetic field that is detected by the probe coil. When the material is without flaws, the two electromagnetic fields are largely out of phase and the fields partially cancel. However, when a flaw exists in the material, the amplitude and phase of the second field are modified and a small detectable signal results, modulated on the return carrier signal. A programmable return signal amplifier optimizes the input range of the analog to digital converter where the signal is converted to a digital signal. The signal is then mixed, or multiplied, with the digital sine and cosine waves. The signals out of the multipliers contain sum and difference products of the mixed signals that contain the amplitude and phase information of the material flaw. Low-pass filters then apply to reject all but the difference frequencies. Then a direct current signal is subtracted from the eddy current signal to shift its axis to zero, which makes it easier to display on a screen.
As stated, the return signal amplifier is to optimize the input range of the analog to digital converter. In doing so, it is limited to scaling the maximum amplitude to the input range of the converter. Though this is an advantage in expanding the eddy current signal modulated on the carrier signal, the small eddy current signal in parts of the return signal other than near the signal maximum amplitude remains relatively small, possibly with insufficient resolution to exploit the information it contains or buried in signal noise below the quantization noise of the analog to digital converter.
SUMMARY
A digital synthesizer generates an electrical digital carrier that is converted to an analog signal and then driven to a probe coil. The coil generates an electromagnetic wave that propagates into a test material proximate the probe coil. A return electromagnetic wave generated by eddy currents in the material includes signatures of material defects modulated on the return carrier electromagnetic wave. The return wave is detected by one or more probe coils and amplified by a return signal amplifier. The signal is then again selectively amplified. That is, sections of the signal out of the return signal amplifier with relatively small amplitudes are again amplified to also exploit the range of the analog to digital converter. Sections of the signal with relatively large amplitudes are less amplified or passed through unchanged. The result is a signal that more fully exploits the range of the analog to digital converter throughout the signal, not just at the signal maximum amplitude. This more general amplification then amplifies the carrier signal and the eddy current signal on the carrier signal even at low signal amplitudes to effectively present the carrier signal and the eddy current signal for digitization with improved signal resolution.
When the signal is demodulated by mixing with the digital sine and cosine functions and low pass filter, only the eddy current signal remains. However, the resultant eddy current signal with the selective amplification yields a high resolution representation of the eddy current signal and signature of the material defect.
To make the selective amplification transparent to the signal analyst, the signal must be restored, while carrying the improved resolution of the defect signature. A bit shifter is used to attenuate the digital output signals by the same ratio that the selectable amplifier amplifies the signal prior to the analog to digital converter. This is achieved by recording the performance of the selective amplifier in a reference memory and reversing it after demodulation of the signal by effecting the bit shift. The digital signal is represented in a series of words having a word width in bits more than needed to fully express the signal amplitude. When the digital signal is bit shifted, it simply moves into previously unused bit places.
The bit shifter operates as a power of two multiplier when shifted to the left into unused bits and a divider when shifted to the right. Therefore, to consistently match the bit shifter, the selectable amplifier must generally also employ quantized steps of amplification in powers of two.
If the gain of the selectable amplifier were constant across the frequency range, then nothing else would need to be added to the digital eddy current signal processor. However, as is the case with any analog amplifier, the magnitude and phase of the selectable amplifier change with respect to frequency. Furthermore, the requirement for amplification in steps of powers of two is ideal. The actual ratio of amplification obtained in a real circuit does not exactly equal a power of two because the tolerance of the resistors in the circuit will cause the ratio to vary slightly. Also, the parasitic capacitance of the circuit board will cause the phase of the selectable amplifier to vary. Therefore in order to accomplish the goal of transparent gain switching, the gain and phase changes of the selectable amplifier must be compensated.
A phase offset is added to the digital synthesizer of the carrier wave to compensate for the phase change of the selectable amplifier. The phase-offset value is equal but opposite to the phase change of the selectable amplifier at the frequency generated by the phase accumulator. The phase change will vary with the gain setting of the selectable amplifier, therefore the phase-offset value will vary to correspond to the gain setting. The phase-offset value, calculated in a calibration procedure, may be zero when the gain setting is low and equal but opposite to the phase change of the selectable amplifier when the gain setting is high.
The gain variation of the selectable amplifier is compensated with a scaling stage after the demodulating mixers but before the low pass filters. The gain-scaling value that is used in the scaling stage is also calculated in the calibration procedure.
REFERENCES:
patent: 3576489 (1971-04-01), Law et al.
patent: 4303885 (1981-12-01), Davis et al.
patent: 4849693 (1989-07-01), Prince et al.
patent: 5461312 (1995-10-01), Hosohara et al.
patent: 5508610 (1996-04-01), Feeney et al.
Tingey David L.
Zetec, Inc.
LandOfFree
Dynamic gain control in a digital eddy current signal processor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Dynamic gain control in a digital eddy current signal processor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dynamic gain control in a digital eddy current signal processor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3259639