Dynamic flip-flop circuit

Details Dynamic flip-flop circuit Dynamic flip-flop circuit

2007-02-23

2009-02-10

Lam, Tuan T (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

C327S199000, C327S200000, C327S201000, C327S202000, C327S203000, C327S204000, C327S205000, C327S206000, C327S207000, C327S208000, C327S209000, C327S210000, C327S211000, C327S212000

Reexamination Certificate

active

07489174

ABSTRACT:
A dynamic flip-flop circuit which outputs an output signal on which a digital data signal is reflected based on a clock, includes: a first control stage configured to output a signal having a level inverted from that of the digital data signal within a period within which the clock has a second level; a second control stage configured to output a signal of a first level within the period within which the clock has the second level and a signal of a level within another period within which the clock has the first level; a third control stage configured to output an output signal of the first level within a period within which the signal outputted from the second control stage has the second level; and a phase adjustment circuit configured to adjust the phase to produce a second clock and supply the second clock to the third control stage.

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Jiren Yuan et al., “High-Speed CMOS Circuit Technique”, IEEE Journal of Solid-State Circuits, vol. 24, No. 1, Feb. 1989, pp. 62-70.

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