Dynamic field patchable microarchitecture

Details Dynamic field patchable microarchitecture Dynamic field patchable microarchitecture

2004-08-09

2009-12-29

Li, Aimee J (Department: 2183)

Electrical computers and digital processing systems: processing

Instruction fetching

C711S170000, C712S214000, C712S248000

Reexamination Certificate

active

07640418

ABSTRACT:
A microprocessor memory architecture including a read-only memory (ROM) with programmed microcode and a random access memory (RAM) capable of storing microcode and one or more data bits used for the selection of corresponding ROM or RAM microcode for execution. A multiplexer receives input signals from both the ROM microcode and RAM microcode, and a control signal which is one or more RAM data bits is used to select from the RAM or ROM microcode inputs for further execution by the microprocessor.

REFERENCES:
patent: 4051459 (1977-09-01), Steranko et al.
patent: 4897813 (1990-01-01), Kumbasar
patent: 5200564 (1993-04-01), Usami et al.
patent: 5357604 (1994-10-01), San et al.
patent: 5584034 (1996-12-01), Usami et al.
patent: 5587953 (1996-12-01), Chung
patent: 5691493 (1997-11-01), Usami et al.
patent: 5732324 (1998-03-01), Rieger
patent: 5757690 (1998-05-01), Mcmahon
patent: 5757872 (1998-05-01), Banu
patent: 5796972 (1998-08-01), Johnson et al.
patent: 5796974 (1998-08-01), Goddard et al.
patent: 5956748 (1999-09-01), New
patent: 6078548 (2000-06-01), Jih
patent: 6167461 (2000-12-01), Keats et al.
patent: 6260157 (2001-07-01), Schurecht
patent: 6266385 (2001-07-01), Roy
patent: 6334179 (2001-12-01), Curran et al.
patent: 6351822 (2002-02-01), Wright
patent: 6438664 (2002-08-01), Mcgrath
patent: 6650880 (2003-11-01), Lee
patent: 6804772 (2004-10-01), Lee et al.
patent: 7228392 (2007-06-01), Lee et al.
patent: 2003/0194982 (2003-10-01), Lee et al.
patent: 2007/0202827 (2007-08-01), Lee et al.
patent: 0 417 390 (1991-03-01), None
“European Search Report Application No. EP 01 25 0211”,Euopean Patent Office, Munich Germany, (Oct. 26, 2004),4 pages.
“Specification of the Bluetooth System”,Version 1.0B, (Dec. 1, 1999),1-1082.
Kwon, Hyuck M., et al., “Improved Zero-If Zero-Crossing Demodulator for Gaussian Minimum Shift Keying Signals in Land Mobile Channels”,Wichita State University, Wichita, US, (May 1996),5 pages.
Pham, N. G., et al., “A High Throughput, Asynchronous, Dual Port FIFO Memory implemented in ASIC Technology”,NCR Corporation, Colorado Springs US, (May 1989),4 pages.
Prophet, Graham, “Living in a Wireless Wonderland”,EDN Magazine, (Jun. 5, 2000),9 pages.
Watola, Dave, “DS2 Digital Receiver Signal Processing Description”, (Apr. 7, 1998), 1-12.

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