Registers – Systems controlled by data bearing records – Time analysis
Patent
1977-08-31
1978-12-19
Atkinson, Charles E.
Registers
Systems controlled by data bearing records
Time analysis
235304, 364200, G06F 1104
Patent
active
041302400
ABSTRACT:
A technique is disclosed for locating the exact machine cycle, in a cyclic operation for a data processor, where an error occurs. Each cycle of the data processor is identified and counted as a cycle where the machine stopped with an error indication that is recorded. The cycles are then all caused to reoccur up to the cycle just preceding that cycle recorded and the machine is caused to stop without allowing the recorded cycle to occur. At this point it is determined whether an error did in fact occur. If an error did in fact occur, then the procedure is repeated, each time allowing the system to process to one cycle less than the preceding last cycle, until the error is no longer present. At this point, the true cycle with which the error occurs is identified as the next cycle just following the last one at which the processor was stopped. The technique may be augmented by suppressing error detections for the cycle so identified, and advancing the processor to succeeding cycles to determine whether any succeeding cycle also generates errors.
REFERENCES:
patent: 3226684 (1965-12-01), Cox
patent: 3564506 (1971-02-01), Bee et al.
patent: 3688274 (1972-08-01), Cormier et al.
patent: 3736566 (1973-05-01), Anderson et al.
Hicks et al., Instruction Retry Mechanism for a Computer, IBM Technical Disclosure Bulletin, vol. 17, No. 8, Jan. 1975, pp. 2239-2242.
Millham Ernest H.
Scaccia Ralph J.
Villante Francis J.
Atkinson Charles E.
Hoel John E.
International Business Machines - Corporation
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