Dynamic error compensation in track-and-hold circuits

Details Dynamic error compensation in track-and-hold circuits Dynamic error compensation in track-and-hold circuits

1999-12-08

2001-08-28

Cunningham, Terry D. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S362000

Reexamination Certificate

active

06281717

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to track-and-hold circuits. More particularly, this invention relates to circuits and methods that compensate for dynamic errors in track-and-hold circuits.
A track-and-hold circuit (sometimes also known as a sample-and-hold circuit) typically operates in two modes—a track-mode that follows (i.e., tracks) an input signal, and a hold-mode that ideally produces and holds an output signal at the same voltage as an input signal received just prior to entering hold-mode. A track-and-hold circuit typically includes a switch coupled in series with a capacitor. The switch typically is CLOSED (i.e., conducts) in track-mode and is OPEN (i.e., does not conduct) in hold-mode. In track-mode, the capacitor ideally charges to the input signal voltage level. In hold-mode, the capacitor is isolated from any load and provides a fixed output signal voltage.
Track-and-hold circuits are commonly used at the front end of discrete time systems, such as, for example, analog-to-digital (A/D) converters. Such converters require a relatively constant input signal during the analog-to-digital conversion process. This may be difficult to obtain if the analog input signal is constantly changing, such as, for example, when the analog input signal is a sine wave. A track-and-hold circuit can provide an A/D converter with constant input signals indicative of tracked analog signals. The A/D converter can then measure and convert those constant signals to appropriate N-bit digital signals.
The switch of a track-and-hold circuit often comprises a MOSFET (metal-oxide-semiconductor field-effect-transistor), and in particular often comprises a CMOS (complimentary MOS) device. A CMOS device includes a PMOS (P-type MOS) FET and an NMOS (N-type MOS) FET. MOSFETs are often chosen as switches because their offset voltage is typically zero.
Ideally, the voltage drop across a CLOSED switch of a track-and-hold circuit should be zero. If the voltage drop is not zero, the capacitor voltage will not equal the input signal voltage. This can create voltage level errors in the output signal, which can cause errors during A/D bit conversion.
MOSFET switches exhibit voltage drops at high input signal frequencies. These voltage drops occur because of nonlinear resistance and capacitance in the MOSFET switch. The likely error in an output signal of a track-and-hold circuit (having a MOSFET switch) that receives, for example, a 20 MHz 1-volt AC input signal is about 0.5 mV. Such an output signal error can cause A/D bit-conversion errors. Moreover, the nonlinear resistance and capacitance of a MOSFET switch varies as a function of input voltage amplitude. Thus, the amount of error is typically dynamic, rendering error compensation difficult.
In view of the foregoing, it would be desirable to provide circuits and methods that compensate for dynamic errors caused by voltage drops across a switch in an electrical circuit such as a track-and-hold circuit.
SUMMARY OF THE INVENTION
It is an object of this invention to provide circuits and methods that compensate for dynamic errors caused by voltage drops across a switch in an electrical circuit such as a track-and-hold circuit.
In accordance with the principles of the present invention, circuits and methods are provided that compensate for voltage drops across a switch in electrical circuits, particularly track-and-hold circuits. In these electrical circuits, a voltage V is applied to a switch coupled in series with a capacitor. The capacitor should preferably charge to V, but instead charges to V minus the voltage drop across the CLOSED (i.e., conducting) switch. In one exemplary embodiment of the present invention, the voltage drop across the CLOSED switch is measured and added to a voltage provided by the capacitor. That voltage then substantially equals the voltage applied to the switch. The result in track-and-hold circuits is that the output signal voltage, which the capacitor provides, substantially equals the input signal voltage. In another exemplary embodiment, the voltage drop across the CLOSED switch is continuously measured, and then, at a given time, the measured voltage drop and the input signal are sampled. The sampled voltage drop is then added to a voltage provided by the capacitor. Again, the result in track-and-hold circuits is that the output signal voltage substantially equals the sampled input signal voltage.


REFERENCES:
patent: 5798747 (1998-08-01), Moraveji
Behzad Razavi,Principles of Data Conversion System Design, pp. 40-42, IEEE Press, 1995.

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