Dynamic element matching in high speed data converters

Details Dynamic element matching in high speed data converters Dynamic element matching in high speed data converters

2006-02-21

2006-02-21

JeanPierre, Peguy (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S155000

Reexamination Certificate

active

07002504

ABSTRACT:
A method for providing dynamic element matching of capacitors in a pipelined analog to digital converter (ADC). Instead of randomizing the output of a flash ADC before providing the output of the ADC to the capacitor array, the threshold voltages from a reference ladder are randomized. This eliminates multiple, series connected switches of a randomizer between the output of a comparator bank and the capacitor array, and may be done during the time the output of the comparator bank of the flash ADC is latched, thereby not negatively impacting the speed of operation of the pipelined ADC.

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Leung, Bosco H. et al., “Multibit Σ-Δ A/D Converter Incorporating A Novel Class of Dynamic Element Matching Techniques”, IEEE Transactions on Circuits and Systems—II: Analog and Digital Signal Processing, Jan. 1992, Pgs. 35-51, vol. 39, No. 1.
Galton, Ian, “Digital Cancellation of D/A Converter Noise in Pipelined A/D Converters” IEEE Transactions on Circuits and Systems—II: Analog and Digital Signal Processing, Mar. 2000, Pgs. 185-196, vol. 47, No. 3.

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