Dynamic decoder circuit with charge-sharing prevention means

Details Dynamic decoder circuit with charge-sharing prevention means Dynamic decoder circuit with charge-sharing prevention means

1988-03-10

1989-05-02

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307449, 307452, 307481, 307579, H03K 19003

Patent

active

048271608

ABSTRACT:
A dynamic type decoder circuit including a first power source line; a second power source line; and output node; a first transistor connected between the first power source line and the output node, the first transistor being turned on during a reset period to reset the output potential of the output node to a predetermined potential level; a second transistor connected to a second power source line, the second transistor being turned on during a decoding period; a plurality of decoding transistors connected in series between the output node and the second transistor, the decoding transistors being controlled in accordance with address signals; and means for forcibly turning on one or more decoding transistors connected between the output node and the decoding transistor directly connected to the second transistor during the reset period regardless of the potential levels of the address signals.

REFERENCES:
patent: 3982138 (1976-09-01), Luisi et al.
patent: 4415819 (1983-11-01), Mathes
patent: 4569032 (1986-02-01), Lee
patent: 4570084 (1986-02-01), Griffin et al.
patent: 4649296 (1987-03-01), Shoji
patent: 4659948 (1987-04-01), Sunter et al.
patent: 4700086 (1987-10-01), Ling et al.
patent: 4710650 (1987-12-01), Shoji
patent: 4780626 (1988-10-01), Guerin et al.

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