Dynamic comparator circuit for cache memories

Details Dynamic comparator circuit for cache memories Dynamic comparator circuit for cache memories

1996-07-29

1998-03-17

Wambach, Margaret Rose

Communications: electrical

Digital comparator systems

36518907, G06F 702

Patent

active

057291900

ABSTRACT:
A dynamic comparator circuit for a cache memory within a computer system is disclosed. In accordance with an illustrative embodiment of the present disclosure, the dynamic comparator circuit includes a first transistor, a first set of two transistors and a second set of two transistors. The first transistor is connected between an output and ground, having its gate connecting to a precharge signal. The first set of two transistors is connected in series between a power supply and the output. The gates of the first set of two transistors are separately connected to a first bit signal and a second bit signal. The second set of two transistors is also connected in series between the power supply and the output. The gates of the second set of two transistors are separately connected to a complement of the first bit signal and a complement of the second bit signal such that a transition occurs in an output signal when the first bit signal matches the second bit signal. In this manner, the dynamic comparator circuit is unaffected by process conditions and variations in operating conditions.

REFERENCES:
patent: 5386207 (1995-01-01), Lin
patent: 5414310 (1995-05-01), Fattaruso
patent: 5488320 (1996-01-01), Carvella et al.
patent: 5642320 (1997-06-01), Jang

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