Dynamic circuits and static latches with low power dissipation

Details Dynamic circuits and static latches with low power dissipation Dynamic circuits and static latches with low power dissipation

1999-09-08

2004-03-09

Lam, Tuan T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

C327S200000

Reexamination Certificate

active

06703882

ABSTRACT:

FIELD OF INVENTION
This invention relates to switching circuits, and more particularly to dynamic switching circuits with low power dissipation.
BACKGROUND
Crossbar current is an undesirable effect occurring in dynamic switching circuits because it contributes to power dissipation. Crossbar current can be present, for example, in the combination of a latch circuit coupled to a dynamic logic gate. To illustrate this, consider circuit
100
in
FIG. 1
, showing half latch (or half keeper)
110
coupled to domino gate
120
. In this example, domino gate
120
is a simple inverter where IN is the input signal applied to nMOSFET
130
(n-metal oxide semiconductor field effect transistor), &phgr; is the clock signal applied to pMOSFET
140
and nMOSFET
150
, and OUT is the output signal captured, or latched, by half latch
110
. Clock signal &phgr; cycles through two phases, which we shall refer to as precharge and evaluation phases as shown in FIG.
1
.
Ignoring any initialization procedure, the OUT signal will be HIGH and pMOSFET
160
will be ON when clock signal &phgr; is in its precharge phase and the OUT signal will be the complement of IN when clock signal &phgr; is in its evaluation phase. Half latch
110
provides a half keeper, or half latch, function to OUT. During a precharge phase, pMOSFET
140
brings OUT to HIGH and forces pMOSFET
160
ON if not already ON. If in the following evaluation phase IN happens to be LOW, then half latch
110
keeps, or latches, OUT HIGH throughout this evaluation phase so that OUT is properly the logical complement of IN.
Crossbar current arises as follows. If IN is HIGH, then OUT will transition from HIGH to LOW and pMOSFET
160
will switch from ON to OFF when clock signal &phgr; transitions from its precharge phase to its evaluation phase. However, because pMOSFET
160
does not turn OFF instantaneously, there will be crossbar current flowing through transistor
160
and domino gate
120
when OUT transitions from HIGH to LOW and pMOSFET
160
switches from ON to OFF.
It is therefore desirable to reduce crossbar current duty cycle in dynamic switching circuits so as to reduce unwanted power dissipation and to increase switching rate.


REFERENCES:
patent: 4578600 (1986-03-01), Magee
patent: 5467044 (1995-11-01), Ashe et al.
“Field Effect Transistor” by Neudeck et al., pp. 119-120, 130-134.

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