Dynamic circuit checking apparatus using data input and output c

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371 24, G06F 1100, G01R 3128

Patent

active

047501812

ABSTRACT:
The present invention relates to a checking circuit concept which determines the integrity of data passing through a further circuit to be checked such as an elastic buffer. The concept is based on the fact that a serial data stream entering an elastic buffer must exit the elastic buffer intact without bit errors. Since the bit delay through the elastic buffer is a variable, it becomes difficult to test bit integrity. The present invention determines the bit integrity by sampling and storing a sequential set of data entering the elastic buffer and successively comparing it to data exiting the buffer. If no errors are present, the stored input data will match the data exiting the elastic buffer within N bits where N equals the storage bit location size of the elastic buffer.

REFERENCES:
patent: 3548175 (1970-12-01), Tomlin
patent: 4380068 (1983-04-01), de Couasnon
patent: 4646328 (1987-02-01), Riou
patent: 4667330 (1987-05-01), Kumagai
patent: 4683569 (1987-07-01), Rubin
patent: 4685053 (1987-08-01), Hattori et al.

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