Patent
1996-09-24
1999-08-03
Harrell, Robert B.
395842, G06F 1200
Patent
active
059336544
ABSTRACT:
A data control system having a host microprocessor, a data receiving device and a DMA controller. The DMA controller being used to control the fragmentation and recombination of a buffer memory area. The data being processed in data packets and using DMA buffer chaining.
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Koichi Tanaka et al., "VLSI Architecture for IEEE 802.5 Token-Ring LAN Controller," IEEE 1989 Custom Integrated Circuits Conference, pp. 15.2.1-15.2.5, 1989.
Boldt Peter J.
Galdun Daniel J.
Allen-Bradley Company LLC
Harrell Robert B.
Horn John J.
Miller John M.
Ovedovitz David M.
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