Dynamic bias circuit for driving low voltage I/O transistors

Details Dynamic bias circuit for driving low voltage I/O transistors Dynamic bias circuit for driving low voltage I/O transistors

1998-01-29

1999-10-26

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

327328, 327389, H03K 508

Patent

active

059735341

ABSTRACT:
A bias circuit that generates a dynamic bias voltage for driving low-voltage transistors in an output buffer that interfaces with high-voltage signals is disclosed. Various circuits have been devised to ensure that no transistor in the bias and the output buffer circuitry undergoes voltages higher than that allowed by the fabrication process, even though the output signal voltage may swing well beyond the tolerable voltage levels. This is accomplished with minimal increase in power consumption and without compromising the speed of operation of the output buffer circuit.

REFERENCES:
patent: 5179297 (1993-01-01), Hsueh et al.
patent: 5444401 (1995-08-01), Crafts
patent: 5504450 (1996-04-01), McPartland
patent: 5663917 (1997-09-01), Oka et al.

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