Dynamic bias circuit

Details Dynamic bias circuit Dynamic bias circuit

2008-01-29

2008-01-29

Nguyen, Khai M. (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

C341S120000, C341S121000, C341S141000

Reexamination Certificate

active

11355678

ABSTRACT:
A bias circuit includes a digital to analog converter (D2A) generating an output representing a voltage level for tuning an analog signal. The D2A is coupled to a primary register frame that is one of a plurality of register frames forming a data chain. The plurality of register frames are serially linked and data within the data chain is shifted among the plurality of register frames. Through a time domain multiplexing scheme, the D2A can be shared by control knobs of the equalization circuit. The bias circuit includes a decoder also coupled to the primary register frame. An output enable logic module is also included. The output enable logic module determines when the primary register has a complete data set as the data within the data chain is shifting according to the clock period. A method for adjusting a signal through a bias circuit is also provided.

REFERENCES:
patent: 5666118 (1997-09-01), Gersbach
patent: 6795000 (2004-09-01), Hummerston et al.
patent: 6888370 (2005-05-01), Luo et al.
patent: 6943588 (2005-09-01), Luo et al.
patent: 7068193 (2006-06-01), Dempsey et al.

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