Dynamic arbitration system and method

Details Dynamic arbitration system and method Dynamic arbitration system and method

1995-06-05

1997-04-08

Harvey, Jack B.

395308, G06F 1314

Patent

active

056196610

ABSTRACT:
A dynamic arbitration system for controlling the data transfer between primary and secondary buses in a personal computer has master and target components on both buses. Primary and secondary bus arbiters are included in a bridge circuit, and initially operate independently of one another in a concurrent arbitration mode of operation. This avoids primary bus interruption for secondary-to-secondary transfers and optimizes the primary bus bandwidth. Whenever a secondary-to-primary bus data transfer cycle is detected, the bridge circuit switches the primary and secondary bus arbiters to an interlocked mode of operation. The interlocked arbitration mode of operation is maintained until the next secondary-to-secondary cycle is detected; whereupon the bridge circuit causes the primary and secondary bus arbiters to be switched back to the concurrent arbitration mode of operation.

REFERENCES:
patent: 5396602 (1995-03-01), Amini et al.
patent: 5517650 (1996-05-01), Bland et al.
patent: 5546546 (1996-08-01), Bell et al.

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