Pulse or digital communications – Receivers – Particular pulse demodulator or detector
Reexamination Certificate
1998-02-11
2004-06-15
Corrielus, Jean B. (Department: 2631)
Pulse or digital communications
Receivers
Particular pulse demodulator or detector
C375S259000
Reexamination Certificate
active
06751272
ABSTRACT:
1. BACKGROUND OF THE INVENTION
a. Field of the Invention
The present invention relates to the field of demodulation of frequency modulated data streams. More particularly, this invention relates to the dynamic adjustment of the output of a quadrature detector to compensate for DC offset errors in a demodulated data stream.
b. Description of Related Art
Many wireless data systems use a form of frequency modulation to modulate a carrier, due to its inherent simplicity. When frequency modulation is used to send and receive data, it is often referred to as Frequency-Shift Keying (FSK). A common implementation of FSK that is often used is to use a different frequency for each bit of information that is sent. For example, as illustrated in
FIG. 1
, if the bit is a logic “1”, one could transmit a frequency f
1
that is slightly higher than some chosen carrier frequency f
c
. If a logic “0” is sent, one would send a frequency f
0
that is slightly lower than some chosen carrier frequency f
c
. In this implementation of FSK, as long as one is sending non-return-to-zero data, the carrier frequency itself is never sent. In some such single-bit FSK systems however, an unmodulated carrier may be used to signal the start and stop of a data packet.
In another implementation of FSK, one might choose to send more than two frequencies (each of the two frequencies is sometimes referred to as a tone). A good example of this is where one uses different frequencies to represent more than one bit at a time. In other words, one could use a symbol, where the symbol is a particular frequency, to represent particular groups of bits. For instance, as illustrated in
FIG. 2
, one could transmit four different tones, each representing a group of two bits. Thus, for a given amount of data, one can cut down on the rate at which the output is modulated as compared to the single-bit FSK discussed above, simply by sending more than one bit with each symbol. This will result in less transmitted bandwidth. In general, the outer tones of a multiple-bit FSK system would be equal to the two tones of a single-bit FSK system operating at the same carrier frequency. In other words, the two outer tones f
0
and f
3
of
FIG. 2
, would be at the same frequencies as f
0
and f
1
of FIG.
1
.
In general, most FSK systems directly modulate a voltage controlled oscillator (VCO) in order to provide the frequency modulated data signal to be sent. The system is designed such that at the operating voltages of the digital input, the output frequency of the VCO is proportional to the input voltage. For example, a higher input voltage corresponds to a higher output frequency, and vice-versa. This is illustrated in FIG.
3
. Often, a lowpass filter is used to bandlimit the input modulation signal prior to feeding it to the VCO. This results in a much narrower transmitted output spectrum from the VCO.
To receive the modulated signal, the reverse needs to be done. In other words, one needs to convert the frequency signal from the VCO back to a voltage signal which contains the original information. There are a variety of circuits that are well known in the art that can be used to perform this frequency-to-voltage conversion. These circuits include quadrature detectors, delay-line discriminators, frequency discriminators, ratio detectors and phase-locked loops. One such circuit, the quadrature detector circuit, is illustrated in
FIG. 4
in simplified block diagram form. The quadrature detector is typically a four quadrant multiplier
40
which receives a frequency modulated signal s(t) as one input and multiplies this signal by a 90-degree phase shifted version
42
of this signal. Typically, the 90 degree phase shifted version
42
of the input signal is created using a tuning circuit
44
including an RLC network having a resistor R
1
, a capacitor C
1
and an inductor L
1
connected in parallel. The output q(t) of the multiplier
40
is a voltage that is proportional to the frequency of the input signal s(t). The output q(t) may then be further processed through a low pass filter
46
to provide an output r(t).
In a typical quadrature detector the two signals are exactly 90-degrees apart only at the carrier center frequency. If the input signal is below the carrier center frequency, then the phase-shifted version of the signal is less than 90-degrees apart and a negative voltage output from the quadrature detector results. If the input signal is above the carrier center frequency, then the output of the quadrature detector is positive.
FIG. 5
illustrates a typical FSK system in simplified block diagram form consisting of a VCO followed by a quadrature detector. The waveforms existing at various portions of the system are also illustrated.
FIG. 6
illustrates a simple radio utilizing an FSK modulation scheme, and a quadrature detector in the demodulation path. In general, most radio systems will be far more complicated than the simple system shown here. Most systems would have one or more up and down frequency conversions, and would contain additional gain stages and filtering.
As illustrated in
FIG. 6
, the radio system includes an antenna
602
, a transmit/receive switch
604
, a receiver
606
, and a transmitter
614
. When the antenna
602
receives a signal, the signal is input to the transmit/receive switch
604
, and further to the receiver
606
including a downconverter
608
and a quadrature detector
610
. The signal from the receiver
606
is then input to an amplifier
612
that outputs a demodulated output signal. When a digital input signal is input to the transmitter
614
, the signal is first input to a VCO
618
and then to an upconverter
616
that outputs an FSK modulated signal that is input to the transmit/receive switch
604
.
Quadrature detectors are commonly used to demodulate FSK signals because they are simple to use and have low power dissipation. However, in order for the quadrature detector to perform optimally, the circuit should be tuned to precisely the carrier center frequency. This ensures that any input signal at the carrier center frequency has an output voltage of zero. If the quadrature detector is not tuned correctly, then a DC offset will be induced on the output of the demodulated bit stream as shown in FIG.
7
. This DC offset will result in a degraded signal-to-noise ratio (SNR) on the output signal, which, in turn, will result in more bit errors, especially in the presence of noise.
One method of tuning a quadrature detector is to manually tune it via a trimmer capacitor or variable inductor in the aforementioned RLC network, at the time of manufacture. However, manually tuned quadrature detectors are not accurate and robust over the long term as they can drift off the center frequency due to temperature changes and aging.
One possible solution to this problem that is known in the prior art is to have some sort of automatic tuning mechanism that relies on adjusting the reactive RLC circuit back to its correct frequency. This can be tough to do on an integrated circuit however, where inductors are sparingly used, of poor quality, and not adjustable. Further, although on-chip capacitors can be made voltage adjustable, they tend to exhibit nonlinear transfer voltage and susceptibility to process and temperature variations.
Another possible solution to the problem of a mistuned quadrature detector is to use a large number of frequency downconversions in the system. For, the output of the VC
0
can be downconverted such that the +/−&Dgr;f is a significant percentage of the downconverted f
c
. If the percentage is large enough, then the significance—measured by the number of bit errors in the final system output stream—of any mistuning may be reduced substantially. This solution however, besides not addressing the problem of actually tuning the quadrature detector, requires additional power and amplification/mixer circuitry to implement several stages of downconversion. Further, each stage of downconversion adds a significant number of frequency harmonics to the overall system
Burns Lawrence M.
Fisher David
Mitchell Scott
Ramachandran Ravi
Woo Chong
3Com Corporation
Corrielus Jean B.
McDonnell Boehnen & Hulbert & Berghoff LLP
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