Electrical computers and digital processing systems: processing – Instruction decoding – Predecoding of instruction component
Reexamination Certificate
2006-01-17
2006-01-17
Kim, Kenneth S. (Department: 2111)
Electrical computers and digital processing systems: processing
Instruction decoding
Predecoding of instruction component
C708S501000, C708S523000, C712S221000
Reexamination Certificate
active
06988184
ABSTRACT:
Methods of performing dyadic digital signal processing (DSP) instructions. In one embodiment of the invention, the method includes fetching a dyadic DSP instruction having a main operation and a sub operation; predecoding the dyadic DSP instruction to generate predecoded instruction signals; and decoding the predecoded instruction signals to generate select signals to selectively couple data from a first plurality of buses coupled to inputs of multiplexers of a first plurality of DSP functional blocks to execute the main operation of the dyadic DSP instruction in one processor cycle and to selectively couple data from a second plurality of buses coupled to inputs of multiplexers of a second plurality of DSP functional blocks to execute the sub operation of the dyadic DSP instruction in the one processor cycle.
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Ganapathy Kumar
Kanapathipillai Ruban
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Kim Kenneth S.
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