DV/DT of power MOSFETS

Details DV/DT of power MOSFETS DV/DT of power MOSFETS

1988-05-23

1989-11-14

James, Andrew J.

357 53, 357 68, 357 2313, H01L 2978, H01L 2944

Patent

active

048811068

ABSTRACT:
A power MOSFET, such as an n-channel MOSFET, is structured to increase the permissible maximum rate of change in voltage during reverse recovery by reducing or eliminating the well containing the active region under the gate bond pad, or any pad which must be isolated from the source metallization, and by providing a polysilicon sheet between the pad area and the substrate. In an n-channel MOSFET where the gate pad is to be protected, the well is a p-well and the active region is the p-region within the well. The p-region under the gate bond pad is reduced to a strip or ring corresponding to the proximity of the gate and the margin of the p-well surrounding the gate pad area. The polysilicon sheet is insulated from the gate pad by a dielectric layer and is held at the potential of the source by connection with the source metallization. The gate oxide area may extend only partially under the polysilicon sheet seperating the gate pad and the n-type substrate (or n-type epitaxial layer), while the remainder of the polysilicon sheet covers a region of field oxide.

REFERENCES:
patent: 3811076 (1974-05-01), Smith, Jr.
patent: 4412242 (1983-10-01), Herman et al.
patent: 4636832 (1987-01-01), Abe et al.
patent: 4682195 (1987-07-01), Yilmaz

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