Duty cycled control implemented within a frequency synthesizer

Details Duty cycled control implemented within a frequency synthesizer Duty cycled control implemented within a frequency synthesizer

1996-04-18

1998-09-29

Tran, Toan

Oscillators

Ring oscillators

331 34, 331 74, 331 75, 331177R, H03B 100

Patent

active

058150420

ABSTRACT:
A programmable frequency synthesizer comprised of a phase locked loop (PLL) including a current controlled oscillator (ICO), a level translator for receiving output signals from the ICO wherein the output signals have a finite slew rate, a reference source of signals, a phase-frequency detector for receiving signals from the reference source and output signals generated by the level translator and for providing pulse signals to the ICO having pulse widths which are directly proportional to phase difference between the signals from the reference source and the output signals from the level translator, and apparatus for varying the slew rate of the output signals from the ICO wherein the duty cycle and thus the frequency of output signals of the level translator may be varied.

REFERENCES:
patent: 5028888 (1991-07-01), Ray
patent: 5233314 (1993-08-01), McDermott et al.
patent: 5399995 (1995-03-01), Kardontchik et al.
patent: 5483205 (1996-01-01), Kawamura

Affiliated with

Also associated with

Rating

Duty cycled control implemented within a frequency synthesizer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Duty cycled control implemented within a frequency synthesizer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Duty cycled control implemented within a frequency synthesizer will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-689155