Duty cycle meter

Details Duty cycle meter Duty cycle meter

1991-12-20

1993-05-11

Sikes, William L.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307234, 3281291, 377 20, H03K 3017, H03K 1756, H03K 504

Patent

active

052104443

ABSTRACT:
A circuit for determining the duty cycle of a control signal includes an oscillator that operates at a frequency that is a predetermined multiple of ten higher than the frequency of the control signal. The oscillator output is connected to the count input of a digital counter, and the control signal is connected to a count inhibit input of the counter. Thus, the counter only counts the oscillator output pulses during the active interval of each cycle of the control signal. Timer means are provided to generate a store trigger signal at the end of a predetermined number of control signal cycles. The store command causes the counter to store and visually display the total count of oscillator pulses detected during the active interval of each cycle. Thus, the count total corresponds to the duty cycle of the control signal. A reset timer is provided to initialize the counter after a predetermined delay from the time that the count total was stored. A threshold timer is provided so that the operator can adjust the circuit to only detect control signal cycles that have a predetermined minimum duty cycle. A timer is also provided to stabilize the counter display over a predetermined time period.

REFERENCES:
patent: 3652943 (1972-03-01), Piccirilli et al.
patent: 3852677 (1974-12-01), Neuville
patent: 3980960 (1976-09-01), Hutchinson
patent: 4475086 (1984-10-01), Allen
patent: 4870665 (1989-09-01), Vaughn
patent: 4890270 (1989-12-01), Griffith
patent: 4912734 (1990-03-01), Frauenglass
patent: 4959807 (1990-09-01), Thomspon et al.
patent: 5095232 (1992-03-01), Hirano et al.

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