Duty cycle correction method for frequency synthesis

Details Duty cycle correction method for frequency synthesis Duty cycle correction method for frequency synthesis

2005-08-09

2005-08-09

Kinkead, Arnold (Department: 2817)

Oscillators

Frequency stabilization

C331S00100A, C331S074000, C327S175000, C327S176000

Reexamination Certificate

active

06927642

ABSTRACT:
A duty cycle correction method converts a pair of differential analog signals from an oscillator into an output pulse signal with 50% of duty cycle. The pulse signal has the same frequency as that of each of the differential analog signals. The duty cycle correction method processes the pair of differential analog signals into a first digital pulse signal and a second digital pulse signal, wherein the first digital pulse signal and the second digital pulse signal have a specified phase difference therebetween, frequency-divides the first digital pulse signal and the second digital pulse signal into a third digital pulse signal and a fourth digital pulse signal, and generates the output pulse signal according to the third and fourth digital pulse signals. The output pulse signal can be generated by performing an exclusive OR operation of the third and fourth digital pulse signals.

REFERENCES:
patent: 6380778 (2002-04-01), Uehara et al.
patent: 6404840 (2002-06-01), Sindalovsky

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