Duty cycle correction circuit of semiconductor memory apparatus

Details Duty cycle correction circuit of semiconductor memory apparatus Duty cycle correction circuit of semiconductor memory apparatus

2011-01-18

2011-01-18

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Rectangular or pulse waveform width control

C327S175000

Reexamination Certificate

active

07872510

ABSTRACT:
A duty cycle correction circuit of a semiconductor memory apparatus includes a duty ratio correcting unit configured to correct a duty ratio of a clock signal according to levels of a first reference voltage and a second reference voltage, and to output the clock signal as a correction clock signal, a duty ratio detecting unit configured to count first and second counting signals in response to a duty ratio of the correction clock signal when a pump enable signal is enabled, a pump enable signal generating unit configured to generate the pump enable signal in response to the duty ratio of the correction clock signal, and a reference voltage generating unit configured to generate the first and second reference voltages in response to the first and second counting signals.

REFERENCES:
patent: 2007/0090866 (2007-04-01), Park et al.
patent: 2009/0295446 (2009-12-01), Yun et al.
patent: 2007-124661 (2007-05-01), None
patent: 1020070046341 (2007-05-01), None
patent: 1020070104727 (2007-10-01), None

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