Duty cycle correction circuit and method thereof

Details Duty cycle correction circuit and method thereof Duty cycle correction circuit and method thereof

2007-10-26

2009-10-06

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Rectangular or pulse waveform width control

C327S172000, C327S173000, C327S174000

Reexamination Certificate

active

07598786

ABSTRACT:
A duty cycle correction circuit comprises a frequency divider, a duty cycle detector and a delay circuit. The frequency divider receives a first clock signal and divides the frequency of the first clock signal to generate a second clock signal. The duty cycle detector receives the second clock signal and a correction clock signal and generates a control signal according to the second clock signal and the correction clock signal. The delay circuit receives the first clock signal and the control signal and adjusts a delay time of a falling edge of the first clock signal according to the control signal to generate the correction clock.

REFERENCES:
patent: 5757218 (1998-05-01), Blum
patent: 6269051 (2001-07-01), Funaba et al.
patent: 6703879 (2004-03-01), Okuda et al.
patent: 6828835 (2004-12-01), Cho
patent: 6989700 (2006-01-01), Kim

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