Duty-cycle adjustable buffer and method and method for...

Details Duty-cycle adjustable buffer and method and method for... Duty-cycle adjustable buffer and method and method for...

2005-05-24

2005-05-24

Ton, My-Trang Nu (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Rectangular or pulse waveform width control

C327S263000

Reexamination Certificate

active

06897696

ABSTRACT:
A duty-cycle adjustable buffer and a method for operating such buffer can be applied to a clock tree circuit for providing an adjustable duty cycle. The duty-cycle adjustable buffer includes a first inverter and a second inverter connected with each other in series. Each of the first inverter and the second inverter includes a plurality of controlled current charging paths and a plurality of controlled current discharging paths, wherein at least one controlled current charging path and at least one controlled current discharging path of the first inverter and the second inverter are conducted. The timing of the rising edge and falling edge of a clock signal is dynamically adjusted so as to dynamically altering the duty cycle of the clock signal.

REFERENCES:
patent: 5111085 (1992-05-01), Stewart
patent: 5790612 (1998-08-01), Chengson et al.
patent: 6069508 (2000-05-01), Takai
patent: 6404258 (2002-06-01), Ooishi

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