Duo-binary signal encoding

Details Duo-binary signal encoding Duo-binary signal encoding

1999-05-27

2001-02-13

Negash, Kinfe-Michael (Department: 2733)

Optical: systems and elements

Deflection using a moving element

Using a periodically moving element

C359S199200, C359S199200, C359S345000, C250S227120

Reexamination Certificate

active

06188497

ABSTRACT:

FIELD OF THE INVENTION
The invention pertains to the field of apparatus for modulation of optical signals. More particularly, the invention pertains to apparatus for multi-level encoding of data in optical communications systems.
BACKGROUND OF THE INVENTION
A Mach-Zender interferometer modulator splits an incoming beam in two, and the two halves of the beam travel along separate paths or “branches”, then being mixed together and interfering with each other. The optical delay of the branches can be controlled by the inputs of the M-Z modulator, and the two branches can be biased so that the two halves cancel completely in the absence of modulation.
In the type of M-Z modulator used in the present invention, there are usually two high-speed modulation inputs, one for each branch, and one or two low-speed bias input(s). This type of modulator is generally termed a “dual-drive modulator”, as is shown in FIG.
1
. The two drive signals applied to the two branches are termed “V
1
(t)” (
1
) and “V
2
(t)” (
4
). The bias voltage, termed “V
bias
”, may either be applied to the one or two low-speed bias inputs (
5
), as shown in
FIG. 1
, or V
bias
may be applied to the high-speed modulation inputs along with V
1
(t) and V
2
(t) using a “bias-T” as was done in U.S. Pat. No. 5,353,114, issued to one of the present inventors for “Opto-Electronic Interferometric Logic”. It will be understood that where the term “bias” is used in this specification, that this is intended to encompass either means of applying the V
bias
.
When the signal is applied to a M-Z modulator, the bias level is adjusted to produce destructive interference, and thus minimum throughput, when the drive voltages on the two modulation (V
1
=V
2
).
Duo binary modulation formats as described here employ two levels for representing a boolean “one”, and one level for representing a boolean “zero”. As shown in
FIG. 2
, the two “one” levels in the electrical domain are typically separated by 2V
&pgr;
and the “zero” level is the average voltage of the two “ones”, assuming a Mach-Zehnder modulator with a constant V
&pgr;
. Here V, the abscissa of
FIG. 2
, is the difference in voltage applied to a dual-drive modulator.
Typical characteristics for duo binary encoding include that it contains no carriers and that the first zero of the baseband spectrum is located at a frequency equal to half the bit rate. The narrow spectral width compared to a conventional NRZ binary signal have been exploited in attempts to minimize sensitivity to dispersion and to enable very high-density wavelength division multiplexing. Furthermore, it has been suggested that its special characteristics will increase the SBS threshold.
Conventional implementations of duo-binary modulation have relied on generating a three level signal electrically either by loss-pass filtering or by three level digital circuitry. Low-pass filtering in particular typically results in poor eye quality current, which leads to significant power penalties.
Optical duo binary signals are typically implemented according to the principle shown in
FIGS. 1
to
4
. As seen in
FIG. 1
, the incoming data signal V
1
(t) (
1
) is fed to one input of an optical modulator, typically one arm of a Mach-Zehnder interferometer (
2
), and the complementary signal Data-bar, V
2
(t) (=−V1(t)) (
4
) is fed to the second input, modulating the optical input (
6
) and resulting a modulated optical signal P(t) (
3
).
As a matter of terminology, the term “Data” will be used herein to mean the data input signal. The term “Data-bar” will be understood to mean the complementary signal to “Data”—that is, when the state of Data is “one”, the state of Data-bar is “zero”, and when Data is “zero”, Data-bar is “one”.
FIGS. 5 and 8
show the schematic of two typical prior-art implementations with driver-amplifiers with a voltage-swing from −V
&pgr;
/2 to +V
&pgr;
/2. The signals V
1
(t) and V
2
(t) may take on values of −V
&pgr;
/2, 0 or +V
&pgr;
/2.
The “ones”, being neighboring local maxima of the modulator voltage-to-optical transfer curve (see FIG.
2
), will have opposite phase for the transmitted optical signal. Optical “ones” here will be denoted “0” and “&pgr;” to indicate the two possible states of the phase. This, however does not indicate the absolute value or the evolution of the phase during a “one”.
In
FIG. 5
a low-pass filter (
51
) with a bandwidth of approximately ¼ to ⅓ of the bit rate is placed in the Data stream (
50
) before the data amplifier (
52
), the output of which, V
1
(t) (
53
) is applied to one branch of the modulator (
55
). A similar low-pass filter (
64
) is placed in the Data-bar stream (
61
) before its data amplifier (
62
), whose output V
2
(t) (
63
) is applied to the other branch of modulator (
55
). The bias voltage V
bias
(
56
) of the modulator (
55
) is set so that V
1
=V
2
results in minimum throughput. Carefully following the evolution of a bit stream will convince one that a duobinary differential encoding is obtained with a characteristic electrical and optical eye pattern as shown in
FIGS. 6 and 7
, respectively, when we assume a square-law detector.
FIG. 8
shows an implementation where the three levels are obtained by high-speed logic gates (i.e. adders (
82
) and (
85
)). The Data input (
50
) is fed to one input of the adder (
82
), and also to a one-bit delay (
81
). The delayed Data signal becomes the second input to adder (
82
). The output of the adder (
82
) is amplified (
52
) and, as V
1
(t) becomes the modulation input (
53
) to the first input of the modulator (
55
). The complementary Data-bar input (
86
) is fed to one input of the adder (
85
), and also to a one-bit delay (
87
). The delayed data-bar signal becomes the second input to adder (
85
). The output of the adder (
85
) is amplified (
82
) and, as V
2
(t) becomes the modulation input (
83
) to the second input of the modulator (
55
). Again, as in
FIG. 5
, the modulator (
55
) is biased (
56
) to produce minimum throughput when V
1
=V
2
is applied. The optical signal input (
54
) is modulated in the modulator (
55
) and the modulated output (
57
) is denoted P(t). The encoding is again differential. The optical eye-pattern observed with a square-law detector is in principle indistinguishable from a conventional NRZ binary modulation format.
FIG. 9
shows graphs of the DATA (
90
), V(t) (
91
) (V(t)=V
1
(t)−V
2
(t)) and P(t) functions for the circuit of FIG.
8
.
Notice that the differential encoding which may be unwanted can be compensated by using a differential encoder (electrical) between the data source and these circuits.
The method of
FIG. 8
can be modified to provide a different distribution of the phases by adopting the diagram of FIG.
10
. Here Data-bar (
86
), delayed one bit period in time delay (
81
), is added in adder (
82
) to DATA (
50
). The result is amplified (
52
), and becomes the modulating input V
1
(t)(
53
) to the modulator (
55
). Similarly, DATA (
50
), delayed one bit in time delay (
87
) is added in adder (
85
) to Data-bar (
86
), amplified in amplifier (
84
), and becomes the second input V
2
(t) (
83
). As in
FIG. 8
, the optical input (
54
) is modulated in modulator (
55
) and the modulated output (
57
) is denoted P(t). Again the bias (
56
) is set to produce minimum throughput for V
1
=V
2
.
FIG. 11
shows graphs of DATA (
90
), V(t) (V(t)=V
1
(t)−V
2
(t)) (
91
) and P(t) (
92
) for the circuit of FIG.
10
.
SUMMARY OF THE INVENTION
The invention presents an apparatus for implementing the application of duo-binary signal encoding in high-power, high-speed transmission systems. In such systems it may be applied to mitigate the problem of stimulated Brillouin scattering (SBS). A dual-drive Mach-Zehnder interferometer modulator is used, with data being applied to both electrical signal inputs. In one embodiment, the data signal is applied to one input, and the same signal, delayed by one bit, is applied to the second input, and the modulat

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