Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2006-05-23
2006-05-23
Ngo, Chuong D. (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
C708S622000
Reexamination Certificate
active
07051061
ABSTRACT:
A circuit is capable of performing a complex division and dual complex multiplication. The complex division involves dividing a first complex value by a second complex value and the dual complex multiplication involves multiplying a third complex value by a fourth complex value and a fifth complex value by a sixth complex value. The circuit comprises a first input configured to receive the first and second complex values when the circuit is performing the complex division and the third and fourth complex values when the circuit is performing the dual complex multiplication. A second input is configured to receive the second complex value when performing the complex division and the fifth and sixth complex values when performing dual complex multiplication. A first output produces a result of complex multiplication of the third and fourth complex values when the circuit is performing the dual complex multiplication. A second output produces a result of the complex division of the first complex value divided by the second complex value when the circuit is performing the complex division and complex multiplication of the fifth complex value by the sixth complex value when performing the dual complex multiplication.
REFERENCES:
patent: 3562505 (1971-02-01), Barlow, Jr. et al.
patent: 4354249 (1982-10-01), King et al.
patent: 4779218 (1988-10-01), Jauch
patent: 6411979 (2002-06-01), Greenberger
patent: 6691144 (2004-02-01), Becker
Hwang et al., “Multiprocessors for Evaluating Compound Arithmetic Functions”, Proceedings of the Symposium on Computer Arithmetic, vol. Symp. 7, IEEE Computer Society Press, New York, Jun. 4, 1985, pp. 266-275.
Prasad et al., “Half-rate GSM Vocoder Implementation on a Dual Mac Digital Signal Processor”, 1997 IEEE International Conference on Acoustics, Speech, and Signal Processing, 1997, ICASSP-97, IEEE Comput. Soc., USA, vol. 1, Apr. 21, 1997, pp. 619-622.
InterDigital Technology Corporation
Ngo Chuong D.
Volpe & Koenig P.C.
LandOfFree
Dual use dual complex multiplier and complex divider does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Dual use dual complex multiplier and complex divider, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual use dual complex multiplier and complex divider will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3589656