Dual-tracking phase-locked loop

Pulse or digital communications – Spread spectrum – Direct sequence

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Details

331 1A, 375 82, H03D 324

Patent

active

048903051

ABSTRACT:
A dual-tracking phase-locked loop circuit is provided for moving with minimum disruption from conventional PLL operation to processor-controlled tracking of another closely related clock. In addition to conventional PLL components the circuit comprises a processor-controlled up/down counter which may operate alternatively as a link in the loop or as providing the base-line frequency determining value at the time of transition from PLL to processor-controlled tracking operation, thereby ensuring none disruptive transition.

REFERENCES:
patent: 3646452 (1972-02-01), Horowitz et al.
patent: 4135166 (1979-01-01), Marchetti
patent: 4151485 (1979-04-01), LaFratta
patent: 4357707 (1982-11-01), Delury
patent: 4418318 (1983-11-01), Swagerty et al.
patent: 4456890 (1984-06-01), Carickhoff
patent: 4503400 (1985-03-01), Edwards et al.

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