Dual threshold decoder for convolutional self-orthogonal codes

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371 36, 371 43, H03K 1302

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044764588

ABSTRACT:
The present invention relates to a decoder (10) for convolutional self-orthogonal codes which includes a multistage syndrome register (16) and is responsive to two separate threshold levels. The first threshold level, as in prior art arrangements, includes a first majority logic circuit (24) connected to selected stages of the syndrome register and functions to correct the information bits (X.sub.1 -X.sub.7) currently being processed. Instead of also using this majority logic circuit to correct the syndrome register, as in the prior art, the present invention includes a second majority logic circuit (28), which operates at a different threshold level than the first and functions to correct the selected stages of the multistage syndrome register.

REFERENCES:
patent: 3227999 (1966-01-01), Hagelbarger
patent: 3439334 (1969-04-01), Massey
patent: 3508197 (1970-04-01), Tong
patent: 3568148 (1971-03-01), Clark
patent: 3605090 (1971-09-01), Burton
patent: 4119945 (1978-10-01), Lewis
Wu "IEEE Transactions on Communications", vol. COM-23, No. 9, Sep. 1975, pp. 942-955.
Wu "IEEE Transactions on Communications", vol. COM-24, No. 1, Jan. 1976, pp. 19-33.
Wu "IEEE Transactions on Communications", vol. COM-24, No. 9, Sep. 1976, pp. 946-955.

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