Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Patent
1995-05-08
1997-05-13
Sterrett, Jeffrey L.
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
323284, 323285, G05F 1563
Patent
active
056296100
ABSTRACT:
A fully digital, current mode, PWM control is realized by employing two distinct comparators, both reading the voltage drop on a sensing resistance. The first comparator exerts an open-loop current mode control. The second comparator, establishing a second higher current threshold than the current threshold set by the first comparator, triggers a disabling circuit of the output power transistor for a preset period of time, when the current level through the output stage uncontrollably rises beyond the second threshold. This may occur because of an insufficient discharge from the load circuit inductance during off-phases of the output power transistor of the extra energy stored during switching delay periods of the first (open loop control) comparator. The frequency of the sequence of bursts may be precisely controlled to be well outside the frequency range of interest to prevent disturbances.
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Cordini Paolo
Pedrazzini Giorgio
Rossi Domenico
Scrocchi Giuseppe
SGS--Thomson Microelectronics S.r.l.
Sterrett Jeffrey L.
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