Dual stage sensing for non-volatile memory

Details Dual stage sensing for non-volatile memory Dual stage sensing for non-volatile memory

2009-06-24

2011-11-01

Dinh, Son (Department: 2824)

Static information storage and retrieval

Interconnection arrangements

C365S206000, C365S207000, C365S163000

Reexamination Certificate

active

08050072

ABSTRACT:
A method and apparatus for accessing a non-volatile memory cell. In some embodiments, a memory block provides a plurality of memory cells arranged into rows and columns. A read circuit is configured to read a selected row of the memory block by concurrently applying a control voltage to each memory cell along the selected row and, for each column, using a respective local sense amplifier and a column sense amplifier to successively differentiate a voltage across the associated memory cell in said column to output a programmed content of the row.

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