Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
2003-05-12
2004-08-24
Jeanglaude, Jean Bruner (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
C341S154000
Reexamination Certificate
active
06781536
ABSTRACT:
TECHNICAL FIELD
The present invention relates to electrical circuits and more particularly to a dual-stage digital-to-analog converter.
BACKGROUND OF INVENTION
A digital-to-analog converter (DAC) converts a digital input, which can include one or more bits of data, into an analog output signal functionally related to the digital input data. A DAC is typically implemented in an integrated circuit or chip, although it can be implemented on a circuit board by an appropriate arrangement of components. DACs further can be utilized in a variety of applications, such as instrumentation applications, level detection applications, drivers for LCD screens, servo tracking, disk drives and communications applications.
A common type of DAC is a linear DAC that generates an analog output signal that varies linearly with respect to the value of the digital input signal. By way of example, a single resistor string voltage scaling DAC produces an analog voltage from a digital word by selectively tapping a voltage-divider resistor string connected between a high and a low voltage reference voltage. Typically, the voltage drop across each resistor is equal to one least significant bit (LSB) of output voltage range.
A dual resistor string DAC, generally referred to as a two-stage cascaded converter, converts a digital word into a corresponding analog signal employing two-cascaded resistor strings. The first stage or resistor string is coupled across two supply voltages, such as a reference voltage and ground. The first resistor string resolves higher order bits of the digital input or control word by selecting one resistor from the first resistor string producing a voltage based on the most significant bits (MSB) of the digital word. The voltage produced by the first resistor string is applied to the ends of a second stage or resistor string. The second resistor string resolves lower order bits of the digital word by selecting a tap of one resistor from the second resistor string via switches based on the least significant bits (LSB) of the digital word. The second resistor string produces an output effectively interpolating the selected first stage segment voltage in accordance with the lower order bits.
FIG. 1
illustrates a conventional dual-stage resistor string DAC system
10
. The DAC system
10
includes a first half coarse string (A)
14
and a second half coarse string (B)
16
coupled through a midpoint (MID)
15
. The first half coarse sting
14
is coupled to an output of an input amplifier
12
. The second half coarse string
16
is coupled to ground through a resistor R
3
via a node
17
. The input amplifier
12
receives a reference voltage V
REF
at a positive input terminal and provides the reference voltage V
REF
at the midpoint
15
via a negative input terminal. The voltage V
REF
at the midpoint
15
causes a current to flow through the resistors of the second half coarse string
16
and the resistor R
3
to ground through the node
17
. The same current flows through the first half coarse string
14
causing a voltage V
HIGH
to be provided at the output of the input amplifier
12
. This provides a voltage drop V
DROP
from the first half coarse string
14
to the midpoint
15
and a similar voltage drop V
DROP
from the midpoint
15
to the node
17
across the second half coarse string
16
. Therefore, the range of the DAC system is set to be V
REF
+/−V
DROP
. For example, if the voltage reference V
REF
was selected to be two volts and the resistor R
3
was selected such that a voltage drop across the resistor R
3
was one volt, then the voltage V
HIGH
would be at three volts. Other ranges can be provided by varying the selection Of V
REF
and R
3
.
A first output of the first half coarse string
14
and a first output of the second half coarse string
16
are coupled to a first input of a fine string
18
via switches S
A
and S
B
. A second output of the first half coarse string
14
and a second output of the second half coarse string
16
are coupled to a second input of the fine string
18
via switches S
A
and S
B
. A MSB control signal (MSB
CTL
) is provided to both the first half coarse string
14
and the second half coarse string
16
. A resistor or segment voltage from one of the first half coarse string
14
and the second half coarse string
16
is selected via internal switches to provide a desire output voltage to the fine string
18
based on the MSB control signal. If the resistor selected is in the first half coarse string
14
, then the switches S
A
are closed and the switches S
B
are opened. If the resistor selected is in the second half coarse string
16
, then the switches S
B
are closed and the switches S
A
are opened. A tap from a resistor in the fine string
18
is then selected based on a LSB control signal (LSB
CTL
) to provide an analog voltage signal at a tap output of the fine string
18
.
The analog voltage signal at the tap output is provided to a positive input terminal of an output amplifier
20
. The output (DAC
OUT
) of the output amplifier
20
corresponds to the analog voltage associated with the MSB and LSB of the digital word provided as input to the DAC system
10
. A first gain switch S
G1
is provided that allows selection of the DAC
OUT
to have unity gain such that the output DAC
OUT
is equal to V
REF
+/−V
DROP
. A second gain switch S
GN
is provided that allows a user to provide a gain to the tap output signal such that the output DAC
OUT
is equal V
REF
+/−N*V
DROP
, where N is the gain provided by the amplifier
20
. The selected gain depends on the selection of a resistor R
1
coupled between the negative terminal of the output amplifier
20
and the output of the output amplifier
20
, and a resistor R
2
coupled between the resistor R
1
and the reference voltage V
REF
. Other switches and resistor configurations can be employed to provide different gains.
The input amplifier
12
and the output amplifier
20
have offset voltage associated therewith and require trimming in order for the DAC system
10
to provide accurate conversion. The offset voltage is also amplified along with the output signal if the gain of the output amplifier is selected to provide a gain greater than unity. The offset voltage and any gain of the offset voltage is undesirable.
SUMMARY OF INVENTION
The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the invention. It is intended to neither identify key or critical elements of the invention nor delineate the scope of the invention. Its sole purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention relates to a dual-stage DAC system and a method of digital-to analog conversion. The dual-stage DAC system includes a coarse resistor network coupled to a fine resistor network. The coarse resistor network includes a first portion and a second portion that provide a plurality of segment voltages. A segment voltage is selected from one of the first portion and the second portion based on a first set of control bits. The fine resistor network provides a tap output voltage selected from a plurality of tap output voltages that correspond to the selected segment voltage. The selected tap output voltage is selected from the fine resistor network based on a second set of control bits. The output of the fine resistor network is provided to an amplifier that sets a reference voltage and buffers the selected tap output voltage. A predetermined current is coupled to one of the first portion and the second portion of the coarse resistor network based on the state of the first set of control bits and/or the segment voltage selected.
In another aspect of the present invention, a dual-stage DAC system is provided that includes a coarse resistor having a first portion and a second portion that provide a plurality of segment voltages. A segment
Brady W. James
Swayze, Jr. W. Daniel
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