Dual slope, feedback controlled, EEPROM programming

Details Dual slope, feedback controlled, EEPROM programming Dual slope, feedback controlled, EEPROM programming

1984-08-14

1986-12-09

Popek, Joseph A.

Static information storage and retrieval

Floating gate

Particular biasing

365104, G11C 1134

Patent

active

046284877

ABSTRACT:
A floating-gate, electrically-erasable, programmable read-only memory cell is programmed or erased by a high voltage across a thin oxide area between the floating gate and the substrate. A tunnelling phenomena is produced by the high voltage. In order to protect the thin oxide from excessive stress, yet minimize programming time, the maximum electric field is controlled by a dual-slope waveform for the programming voltage Vpp. The values of slope and breakpoints for this dual-slope Vpp voltage are selected by a feedback arrangement which is responsive to process variations in threshold voltage, supply voltage, etc.

REFERENCES:
patent: 4434478 (1984-02-01), Cook et al.
D. H. Oto et al., "High-Voltage Regulation and Process Considerations for High-Density 5 V-Only E.sup.2 PROM's", IEEE Journal of Solid-State Circuits, vol. SC-18, No. 5, Oct. 1983, pp. 532-534.

Affiliated with

Also associated with

Rating

Dual slope, feedback controlled, EEPROM programming does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dual slope, feedback controlled, EEPROM programming, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual slope, feedback controlled, EEPROM programming will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1389686