Dual slew rate circuit for driver transistors in disk drives

Details Dual slew rate circuit for driver transistors in disk drives Dual slew rate circuit for driver transistors in disk drives

1994-09-30

1996-08-27

Wysocki, Jonathan

Electricity: motive power systems

Limitation of motor load, current, torque or force

318254, 318138, H02P 700

Patent

active

055504469

ABSTRACT:
A method and circuit for providing a dual slew rate to a driver transistor. The method includes turning off a driver transistor at a programmable slew rate until a BEMF voltage spike is sensed, and then switching in a slower clamping slew rate. The slew rates are controlled by discharging a capacitor through a programmable discharge path until a voltage spike is detected and then through a clamping discharge path. The discharge paths include several transistors connected in series and control by digital logic.

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patent: 5166544 (1992-11-01), Carobolante
patent: 5172036 (1992-12-01), Cameron
patent: 5191269 (1993-03-01), Carobolante
patent: 5204594 (1993-04-01), Carobolante
patent: 5210474 (1993-05-01), Oswald
patent: 5221881 (1993-06-01), Cameron
patent: 5309078 (1994-05-01), Cameron
patent: 5397967 (1995-03-01), Carbolante et al.
patent: 5451832 (1995-09-01), Cameron et al.

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