Dual-sense impedance-matched reader

Dynamic magnetic information storage or retrieval – General processing of a digital signal – Head amplifier circuit

Reexamination Certificate

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Details

C360S067000

Reexamination Certificate

active

06707625

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a preamplifier for a magnetoresistive (MR) read system, and more particularly to an impedance-matched read system employing both a voltage-sense amplifier and a current-sense amplifier to achieve improved response.
A popular method of magnetic data storage utilizes MR heads to store and recover data on a magnetic data storage medium such as a magnetic disk. An MR head employs an MR element that changes in resistivity with changing magnetic flux from data patterns on an adjacent magnetic disk surface. When the MR element is properly coupled to a read circuit amplifier, the amplifier senses, or detects, the resistance of the MR element as a voltage or current signal representing the magnetic flux from the disk. This signal is amplified by a preamplifier circuit for manipulation and analysis, so that the data recorded on the disk may be accurately recovered.
As a general rule, matching the impedances of cooperating circuits and/or transmission lines achieves the most desirable circuit response characteristics, eliminating the effects of mismatch-caused signal reflections on the performance of the circuit which occur at high frequencies. Impedance matching therefore increases the effective bandwidth of the circuit. Preamplifier circuits are no different in this respect, and optimal preamplifier performance would be achieved if the impedances of either the preamplifier and the interconnect or the interconnect and the MR head were matched to one another. Precise impedance matching of the MR element and the interconnect is not practical because the impedance of the head is not a tightly controlled parameter in manufacturing. In most read systems, an approximate impedance match is not obtainable, since the MR element typically has an impedance between about 30 Ohms and about 80 Ohms, and the interconnect typically has an impedance of about 100 Ohms (&OHgr;). The preamplifier circuit therefore could potentially be impedance-matched to the interconnect, yielding a circuit with improved performance.
In addition to impedance matching, low noise is also required for effective preamplifier circuit performance. There are three general types of noise associated with preamplifier circuits: current noise, voltage noise and correlated noise, where correlated noise is simply the noise associated with those sources that generate both current noise and voltage noise in a correlated fashion. These three noise sources must all be constrained to sufficiently low levels for the preamplifier circuit to perform effectively.
Traditionally there have been two general types of preamplifier circuits utilized in MR read systems: voltage-sense preamplifiers and current-sense preamplifiers. Both of these types of preamplifiers are well known in the art. For a voltage-sense preamplifier circuit, a classic approach to match the impedance of the preamplifier to the impedance of the interconnect would be to connect a matching resistor between the input terminals of the preamplifier in parallel with the signal from the MR element. The resistance of the matching resistor would have a value equal to the characteristic impedance of the interconnect. However, introducing the matching resistor in this manner results in a significant increase in the current noise associated with the preamplifier, such that the preamplifier circuit is unable to perform effectively.
For a current-sense preamplifier circuit, a classic approach to match the impedance of the preamplifier to the impedance of the interconnect would be to connect a matching resistor in series with each of the input terminals of the preamplifier. The resistance of each matching resistor would have a value equal to half of the characteristic impedance of the interconnect. However, introducing the matching resistors in this manner results in a significant increase in the correlated noise associated with the preamplifier, such that the preamplifier circuit is unable to perform effectively. Another possible approach would be to increase the input impedance of the current-sense preamplifier by adjusting the bias current associated with the input transistors to increase the emitter resistance of those transistors so as to match the impedance of the transmission line. This approach also increases the correlated noise associated with the preamplifier in an undesirable manner.
There is a need in the art for an improved preamplifier circuit that is impedance matched without introducing excessive noise that would render the preamplifier circuit ineffective, and which also provides a sufficient level of gain. Such a preamplifier circuit is the subject of the present invention.
BRIEF SUMMARY OF THE INVENTION
The present invention is a preamplifier system for connection through an interconnect to a read head. The preamplifier system includes a voltage-sense preamplifier having at least one input connected through the interconnect to the read head and having at least one output, and also includes a current-sense preamplifier having at least one input connected through the interconnect to the read head and having at least one output. A summing circuit is connected to combine the outputs of the voltage-sense preamplifier and the current-sense preamplifier. For optimal performance, the preamplifier system is impedance matched to the interconnect. The preamplifier system achieves excellent response due to impedance matching with acceptably low noise levels, since the correlated noise associated with the current-sense preamplifier is canceled at the summing circuit. This is the most significant noise source in the dual-sense preamplifier system, and when canceled, the total noise of the impedance-matched preamplifier system is similar to the noise achieved by a non-impedance-matched voltage-sense or current-sense preamplifier alone.


REFERENCES:
patent: 6265905 (2001-07-01), Jove et al.
patent: 6271977 (2001-08-01), Chung et al.
patent: 6420910 (2002-07-01), Contreras et al.
Leighton et al, IEEE Transactions on Magnetics, vol. 37, No. 2, Mar. 2001, pp. 627-632.*
Howard W. Johnson and Martin Graham, “High-Speed Digital Design”, 1993, p. 161, Prentice Hall PTR, New Jersey.

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