Dual semiconductor die package with reverse lead form

Details Dual semiconductor die package with reverse lead form Dual semiconductor die package with reverse lead form

2007-07-31

2007-07-31

Smith, Zandra V. (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S676000, C257S706000, C257S796000, C257SE23042

Reexamination Certificate

active

10987697

ABSTRACT:
A semiconductor package that includes two semiconductor die each disposed on a respective die pad and a large tracking distance interposed between at least two leads of the package for better creepage characteristics.

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patent: 6777795 (2004-08-01), Sasakura et al.
patent: 2002/0109211 (2002-08-01), Shinohara
patent: 2002/0171405 (2002-11-01), Watanabe
patent: 2003/0057530 (2003-03-01), Karrer
patent: 2003/0075783 (2003-04-01), Yoshihara
patent: 2003/0183907 (2003-10-01), Hayashi et al.
patent: 2004/0004272 (2004-01-01), Luo et al.
patent: 2005/0212101 (2005-09-01), Funato

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