Dual reference voltage input receiver for high speed data transm

Details Dual reference voltage input receiver for high speed data transm Dual reference voltage input receiver for high speed data transm

1996-12-30

1999-08-03

Pham, Chi H.

Pulse or digital communications

Receivers

Automatic baseline or threshold adjustment

375287, 375318, 327 52, 327 72, 327 74, H04L 2506

Patent

active

059334592

ABSTRACT:
A dual reference voltage input receiver comprises a latch, comparison logic for determining the voltage level of a data signal relative to that of first and second reference voltage levels, and selection logic for determining which of the reference voltage levels is operative for a given data interval, e.g. clock cycle. The latch couples the determined voltage level of the data signal to a subsequent stage and to the selection logic for determining the operative reference voltage level in the next data interval. In one embodiment of the invention, the comparison logic includes first and second comparators for comparing the data signal with first and second reference voltages, and the selection logic is a MUX having its data inputs coupled to the comparators' outputs and its selection input coupled to the data output of the latch.

REFERENCES:
patent: 5117124 (1992-05-01), Dicke
patent: 5214319 (1993-05-01), Abdi
patent: 5373400 (1994-12-01), Kovacs
patent: 5465059 (1995-11-01), Pan et al.
patent: 5576842 (1996-11-01), Choi

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