Dual reference oscillator phase-lock loop

Details Dual reference oscillator phase-lock loop Dual reference oscillator phase-lock loop

2009-12-08

2011-11-15

Kinkead, Arnold (Department: 2817)

Oscillators

With frequency adjusting means

With voltage sensitive capacitor

C331S016000, C331S018000, C331S034000, C327S156000

Reexamination Certificate

active

08058942

ABSTRACT:
A phase-locked loop has a stable high frequency reference oscillator to provide a stable high frequency reference signal that has reference frequency that is a small submultiple of a generated frequency of a voltage controlled oscillator within the phase-locked loop. An adjustable output frequency feedback circuit has with a feedback divide ratio that is approximately the small submultiple and adjusts the feedback ratio such that the generated frequency of the voltage controlled oscillator is locked to a stable low frequency reference input signal. The feedback divide ratio is adjusted as a function of a required ratio change value that is a function of a current phase error of the generated frequency of a voltage controlled oscillator and the stable low frequency reference input signal and a phase error derivative. The phase error derivative is a difference of the current phase error and a previous phase error.

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Co-pending U.S. Appl. No. 12/592,598, filed Nov. 30, 2009, Digital Controller for Automatic Rate Detection and Tracking of Audio Interface Clocks, assigned to the same assignees as the present invention.

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