Electrical computers and digital processing systems: multicomput – Bused computer networking
Patent
1996-12-03
1999-11-23
An, Meng-Ai T.
Electrical computers and digital processing systems: multicomput
Bused computer networking
709213, 709203, 711139, 711145, G06F 1300
Patent
active
059918195
ABSTRACT:
A symmetric multiprocessor system constructed from industry standard commodity components together with an advanced dual-ported memory controller. The multiprocessor system comprises a processor bus; up to four Intel Pentium.RTM. Pro processors connected to the processor bus; an I/O bus; a system memory; and a dual-ported memory controller connected to the system memory, the dual ported memory controller having a first port connected to the processor bus to manage processor to system memory transactions and a second port connected to the I/O bus to manage I/O transactions. Furthermore, two such systems can be connected together through a common I/O bus, thereby creating an eight-processor Pentium.RTM. Pro processor SMP system.
REFERENCES:
patent: 5001671 (1991-03-01), Koo et al.
patent: 5025365 (1991-06-01), Mathur et al.
patent: 5197146 (1993-03-01), La Fetra
patent: 5228135 (1993-07-01), Ikumi
patent: 5247649 (1993-09-01), Bandoh
patent: 5249283 (1993-09-01), Boland
patent: 5276832 (1994-01-01), Holman, Jr.
patent: 5335335 (1994-08-01), Jackson et al.
patent: 5361340 (1994-11-01), Kelly et al.
patent: 5386511 (1995-01-01), Murata et al.
patent: 5426765 (1995-06-01), Stevens et al.
patent: 5506971 (1996-04-01), Gullette et al.
patent: 5511226 (1996-04-01), Zilka
patent: 5515522 (1996-05-01), Bridges et al.
patent: 5519839 (1996-05-01), Culley et al.
patent: 5524215 (1996-06-01), Gay
patent: 5535116 (1996-07-01), Gupta et al.
patent: 5548730 (1996-08-01), Young et al.
patent: 5551005 (1996-08-01), Sarangdhar et al.
patent: 5659687 (1997-08-01), Kim et al.
patent: 5752258 (1998-05-01), Guzovskiy et al.
patent: 5765195 (1998-06-01), McDonald
"A New Solution to Coherence Problems in Multicache Systems," Censier, Lucien M., et al., IEEE Transactions on Computers, vol. C-27, No. 12, Dec. 1978, pp. 1112-1118.
An Meng-Ai T.
Intel Corporation
Patel Gautam R.
LandOfFree
Dual-ported memory controller which maintains cache coherency us does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Dual-ported memory controller which maintains cache coherency us, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual-ported memory controller which maintains cache coherency us will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1234911