Dual port memory circuit

Details Dual port memory circuit Dual port memory circuit

1987-07-06

1989-08-08

Hecker, Stuart N.

Static information storage and retrieval

Addressing

Sequential

36518905, 36523005, 36523009, G11C 800

Patent

active

048559598

ABSTRACT:
An improved dual port memory circuit in which data transfer from the memory array to the data register can be performed without interrupting the serial access in the serial access port is shown. The memory circuit is featured in that first and second transfer circuits are provided between a first half and the second remaining half of the columns, and first and second registers, respectively. One of the transfer circuits which is connected to the non-accessed data register is enabled while serial access to the accessed data register is maintained.

REFERENCES:
patent: 4044339 (1977-08-01), Berg
patent: 4247920 (1981-01-01), Springer et al.
patent: 4322635 (1982-03-01), Redwine
patent: 4433394 (1984-02-01), Torii et al.
patent: 4644502 (1987-02-01), Kawashima

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