Dual plane barrier-type two-phase CCD

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

357 59, 357 91, 307221D, 29589, H01L 2978, H01L 2904, G11C 1928

Patent

active

042272025

ABSTRACT:
A charge coupled device having geometries suitable for fabrication in high density packages (64,000 bits per chip--1,000,000 bits per chip) is comprised of a semiconductor substrate having dopant impurity atoms of a first type and a first surface. A charge transfer channel lies in the substrate near the first surface; and it is overlaid by an insulating layer of non-uniform thickness. A plurality of first and second electrodes lie on the insulating layer traversely to the channel. A barrier region of dopant impurity atoms of the first type lies under each of the electrodes. The non-uniform insulating layer underlies each of the first electrodes by a first uniform thickness, underlies the second electrodes by a second uniform thickness, and separates the each of the first and second electrodes by approximately the second thickness. The second thickness is 20%-60% greater than the first thickness to greatly reduce inter-electrode shorts in high density packages. A shallow layer of dopant atoms of a second type opposite to the first type may be provided under the second electrodes to compensate for flatband voltage shifts due to the thick insulating layer.

REFERENCES:
patent: 3789267 (1974-01-01), Krambeck et al.
patent: 3796932 (1974-03-01), Amelio et al.
patent: 3852799 (1974-12-01), Walden
patent: 3950188 (1976-04-01), Bower
patent: 4035906 (1977-07-01), Tasch et al.
patent: 4047215 (1977-09-01), Frye et al.
patent: 4060738 (1977-11-01), Tasch et al.

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