Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Including integrally formed optical element
Reexamination Certificate
2007-04-11
2009-06-23
Luu, Chuong Anh (Department: 2892)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Including integrally formed optical element
C438S048000, C438S197000, C438S149000
Reexamination Certificate
active
07550306
ABSTRACT:
A method of fabricating a dual panel-type active matrix organic electroluminescent device includes patterning a first metal layer to form a gate electrode, a gate line, a power line, a gate pad, and a power pad on a first substrate, forming a first insulating layer on the first substrate to cover the gate electrode, the gate pad, and the power pad, forming a semiconductor layer on the first insulating layer over the gate electrode, the semiconductor layer including an active layer of undoped amorphous silicon and an ohmic contact layer of doped amorphous silicon, forming source and drain electrodes, a data line, a first link electrode, and a data pad, wherein the source and drain electrodes are disposed on the ohmic contact layer, wherein the data line, the data pad, and the first link electrode are disposed on the first insulating layer, and wherein the first link electrode crosses the gate line, forming a channel within the active layer by etching a portion of the ohmic contact exposed between the source and drain electrodes to form a thin film transistor including the gate electrode, the semiconductor layer, the source electrode, and the drain electrode, forming a second insulating layer on the first insulating layer to cover the thin film transistor, the data line, and the data pad, forming a source contact hole, a drain contact hole, a data pad contact hole, a gate pad contact hole, and a power pad contact hole, wherein the source, drain and data pad contact holes penetrate the second insulating layer, and wherein the gate pad and power pad contact holes penetrate the first and second insulating layers, forming a connecting pattern on the pixel region on the second insulating layer using an insulating material, wherein the connecting pattern has a pillar shape and a height greater than a corresponding height of the thin film transistor, forming a connecting electrode, a power electrode, second link electrodes, a data pad terminal, a gate pad terminal, and a power pad terminal using a third metal layer.
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Cho So-Haeong
Park Jae-Yong
LG Display Co. Ltd.
Luu Chuong Anh
Morgan & Lewis & Bockius, LLP
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