Dual oxide stress liner

Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – With housing or external electrode

Reexamination Certificate

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Details

C438S053000

Reexamination Certificate

active

07863646

ABSTRACT:
A transistor structure includes a first type of transistor (e.g., P-type) positioned in a first area of the substrate, and a second type of transistor (e.g., N-type) positioned in a second area of the substrate. A first type of stressing layer (compressive conformal nitride) is positioned above the first type of transistor and a second type of stressing layer (compressive tensile nitride) is positioned above the second type of transistor. In addition, another first type of stressing layer (compressive oxide) is positioned above the first type of transistor. Further, another second type of stressing layer (compressive oxide) is positioned above the second type of transistor.

REFERENCES:
patent: 6995065 (2006-02-01), Chou et al.
patent: 7585704 (2009-09-01), Belyansky et al.
patent: 2006/0226490 (2006-10-01), Burnett et al.

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