Boots – shoes – and leggings
Patent
1990-12-10
1993-02-23
Mai, Tan V.
Boots, shoes, and leggings
364749, G06F 750
Patent
active
051896362
ABSTRACT:
A video signal processor includes cicuitry which may be conditioned by a mode control signal to operate as a single 16-bit adder or as two eight-bit adders. The circuitry includes two eight-bit adders, each of which has a carry-in input terminal and a carry-out output terminal. The carry-out output terminal of one of the adders is selectively coupled, via an AND gate, to the carry-in input terminal of the other adder. The AND gate is controlled by the mode control signal. In the mode where the circuitry operates as two eight-bit adders, additional circuiry is included to detect output values which may exceed the zero to 255 range of valid values and to saturate these invalid values either at zero or 255.
REFERENCES:
patent: 4707800 (1987-11-01), Montrone e al.
patent: 4739503 (1988-04-01), Armer et al.
patent: 4914617 (1990-04-01), Punrino et al.
patent: 5038314 (1991-08-01), Kelleher
IBM Technical Disclosure Bulletin, vol. 15, No. 4, pp. 1149-1150, "Variable-Width Adder for Microprogrammed Computer Used for Emulation", J. L. Rosenfeld, Sep. 1972.
Fedele Nicola J.
Harney Kevin
Patti Michael F.
Simon Allen H.
Intel Corporation
Linguiti Frank M.
Mai Tan V.
Murray William H.
Silverman Carl L.
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