Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2002-03-21
2004-10-26
Patel, Rajnikant B (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
C323S284000, C363S016000
Reexamination Certificate
active
06809504
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to microelectronic devices. More particularly, the present invention relates to a circuit for regulating a supply voltage for a load device, such as internal circuitry for microprocessors and the like.
BACKGROUND OF THE INVENTION
As modem digital integrated circuits are being continuously enhanced to deliver increased performance, such digital integrated circuits are becoming increasingly sensitive to degradation in waveform quality. In particular, as clock rates and circuit density increase, a significant amount of transient current must be supplied to charge and discharge the internal capacitive loads within the digital integrated circuits. These severe current transients, if not adequately filtered or regulated, can result in supply and ground “bounce” which can introduce bit errors in the digital logic through degraded noise margin and supply induced timing violations.
Supply and ground bounce can be somewhat mitigated through the use of voltage regulation and internal and external capacitive bypassing techniques, as well as the use of low inductance and low resistance pins within the digital integrated circuit. However, the amount of voltage regulation and capacitive bypassing that can be provided is limited by the impact on the digital integrated circuit's cost and complexity, as well as performance limitations of the passive components and parasitics associated with the placement of such components.
For example, with reference to
FIG. 1
, a prior art methodology for voltage regulating and capacitive bypassing of the internal supply and ground on an integrated circuit is illustrated. A digital integrated circuit
100
comprises a supply voltage V
SUPPLY
, a voltage regulator
102
, a bypass capacitor C
BYPASS
, and internal circuitry represented as a dynamic load
104
. Dynamic load
104
comprises the device that requires power to be supplied, such as a microprocessor. Dynamic load
104
includes both high frequency content in the form of current pulses as the internal nodes switch, and time varying characteristics as the internal circuitry activity level varies depending on the function the internal circuitry is performing at any given time.
Voltage regulator
102
can comprise a switching or a non-switching regulator, and is configured to operate from supply voltage V
SUPPLY
, such as a 12 volt supply. Voltage regulator
102
is configured to generate a well-controlled, regulated supply voltage to dynamic load
104
, such as a 1.8 volts. Voltage regulator
102
is coupled to dynamic load
104
through a parasitic inductance L
SUPPLY
and a parasitic inductance L
GROUND
, which can cause changes in load current resulting in changes in the voltage at dynamic load
104
.
Voltage regulator
102
can be effective in tracking the slow changes in dynamic load
104
, i.e., within the internal circuitry. However, due to requirements for a relatively low bandwidth, voltage regulator
102
cannot track fast changes within the internal circuitry. In particular, the ability of voltage regulator
102
to respond to fast transient events is set by the bandwidth of voltage regulator
102
. While a wide bandwidth loop is desirable, the bandwidth of the voltage regulator loop must be limited such that the loop stability criteria can be met. This requirement results in a relatively slow response to transients, and little, if any, suppression of the critical high frequency components.
For example, in a closed-loop system, the delay due to parasitics and devices, such as amplifiers and buffers, can be a source of instability. If the loop response is delayed by over a half period, the polarity is inverted, so the loop gain must be below unity or the loop will be unstable. Therefore, linear loops are often stabilized by reducing the loop bandwidth such that the effect of component delays are minimized. This reduced bandwidth limits the ability of linear regulator loops to compensate for fast changes in dynamic load current.
Bypass capacitor C
BYPASS
is coupled across dynamic load
104
. Bypass capacitor C
BYPASS
can be effective in filtering the dynamic switching currents, such as that caused by a change in current through parasitic inductances L
SUPPLY
and L
GROUND
. Bypass capacitor C
BYPASS
is configured to sustain the load voltage required by dynamic load
104
, by supplying current from bypass capacitor C
BYPASS
, to provide additional time for voltage regulator
102
to accommodate the changes at dynamic load
104
. However, in response to changes in dynamic load
104
, bypass capacitor C
BYPASS
can only sustain the required load voltage for a brief period of time. Thus, a voltage “droop”, i.e., an undervoltage condition, or a “spike”, i.e., an overvoltage condition, in the load voltage can be realized until voltage regulator
104
can respond. If the voltage droop or spike exceeds the tolerable range in power supply, the internal circuitry operates with degraded noise margin and timing performance, increasing the possibility of bit errors and timing violations in the digital circuitry. This voltage drooping or spiking problem exists when load current in dynamic load
104
is increased or decreased, respectively.
One approach for addressing the undervoltage and overvoltage conditions includes the use of a secondary regulator for improved transient response. For example, with reference to
FIG. 2
, a power supply circuit
200
with secondary voltage regulation is illustrated, as is disclosed more fully in U.S. application Ser. No. 09/945,187, entitled, “Apparatus and System for Providing Transient Suppression Power Regulation”, filed on Aug. 31, 2001, and having common inventors and a common assignee as the present application. Power supply circuit
200
includes an unregulated DC voltage supply
202
, a primary voltage regulator
204
, a secondary voltage regulator
206
, a sense circuit
210
and a load
208
.
Unregulated DC voltage supply
202
provides a supply voltage V
IN
to primary voltage regulator
204
, which can provide a regulated output voltage V
OUT
to load
208
. Sense circuit
210
is configured to sense changes in current and to enable secondary voltage regulator
206
to suitably source current to or sink current from load
208
. Secondary voltage regulator
206
is configured to provide a fixed amount of current for a fixed amount of time, independent of the total magnitude of the change in load current. Thus, while secondary voltage regulator
206
and sense circuit
210
are configured for fast detection of an undervoltage or overvoltage condition, regulator
206
and sense circuit
210
may not be optimum for closed-loop operation.
SUMMARY OF THE INVENTION
In accordance with various aspects of the present invention, a dual loop regulator is configured for improved regulation of a supply voltage for a dynamic load based on the magnitude of changes in the load voltage. An exemplary dual loop regulator comprises a primary voltage regulator configured within a slower response, linear loop and a secondary voltage regulator configured within a faster response, non-linear wideband loop. The primary voltage regulator is configured for providing a well-controlled, regulated load voltage to the dynamic load by addressing small changes in the load voltage. The secondary voltage regulator is configured for determining undervoltage and/or overvoltage conditions at the dynamic load, and for addressing changes in the load voltage greater than predetermined threshold values. To facilitate loop stability, secondary voltage regulator can be configured within the wideband, non-linear loop to have a small gain for small changes, a larger gain for large changes, and/or a substantially finite charge storage capability such that any large signal oscillations will not be sustained.
In accordance with an exemplary embodiment, the secondary voltage regulator comprises at least one comparator device configured for detecting changes in the load voltage, e.g., for determining undervoltage or overvoltage conditions, a
Duong Clifford
Ng Tim
Ostrom Ken
Tang Benjamim
Galanth Theodore E.
Patel Rajnikant B
Primarion, Inc.
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