Dual-loop PLL with adaptive time constant reduction on first loo

Details Dual-loop PLL with adaptive time constant reduction on first loo Dual-loop PLL with adaptive time constant reduction on first loo

1997-11-13

2000-04-25

Kinkead, Arnold

Oscillators

Automatic frequency stabilization using a phase or frequency...

Particular error voltage control

331 10, 331 1A, 331108C, H03L 708

Patent

active

060549033

ABSTRACT:
A phase-locked loop fabricated on an integrated circuit includes a phase/frequency detector, a charge pump, a filter node and a voltage-controlled oscillator (VCO) which are coupled together in series. The VCO has first and second frequency control inputs and a VCO output, wherein the first frequency control input is coupled to the filter node and the VCO output is coupled to the phase/frequency detector. The VCO has a first voltage-to-frequency gain from the first frequency control input to the VCO output and a second voltage-to-frequency gain from the second frequency control input to the VCO output. An off-chip filter input is coupled to the filter node for coupling to an off-chip loop filter. An on-chip loop filter is coupled between the first frequency control input and the second frequency control input and has a variable time constant. A time constant control circuit is coupled to the on-chip loop filter for controlling the variable time constant.

REFERENCES:
patent: 4608543 (1986-08-01), Adams
patent: 4689581 (1987-08-01), Talbot
patent: 4857866 (1989-08-01), Tateishi
patent: 4890052 (1989-12-01), Hellums
patent: 5144156 (1992-09-01), Kawasaki
patent: 5534823 (1996-07-01), Kondou
patent: 5539344 (1996-07-01), Hatakenaka
patent: 5640126 (1997-06-01), Mellot
patent: 5659588 (1997-08-01), Fiedler
J. Alvarez et al., "A Wide-Bandwidth Low-Voltage PLL for PowerPC.TM. Microprocessors," IEEE Journal of Solid-State Circuit, vol. 30, No. 4, Apr. 1, 1995, pp. 383-390.

Affiliated with

Also associated with

Rating

Dual-loop PLL with adaptive time constant reduction on first loo does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dual-loop PLL with adaptive time constant reduction on first loo, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual-loop PLL with adaptive time constant reduction on first loo will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-996587